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adms: A code generator for the Verilog-AMS language

ADMS is a code generator that converts electrical compact device models specified in high-level description language into ready-to-compile C code for the API of spice simulators. Based on transformations specified in XML language, ADMS transforms Verilog-AMS code into other target languages.
Name:adms
Release: 2.3.7-3mamba
Group:Applications/Scientific
Maintainer:silvan
License:GPL
Size:167.11 kB
Upstream URL:https://sourceforge.net/projects/mot-adms/
Build time:2026-10-15 02:34:28
Source files
adms-2.3.7-c23-verilogaparse.patch
adms-2.3.7-cmake-policy-new.patch
ADMS-2.3.7.tar.bz2
adms.spec
Binary packages and requirements
x86_64i586
Built RPMSadms
adms-debug
adms
adms-debug
Build requirementscmake [1]
glibc-devel [1]
cmake [1]
glibc-devel [1]
History of changes
DatePackagerReleaseDescription
2026-10-15autodist2.3.7-3mamba- automatic rebuild by autodist
- fix build with C23 (verilogaparse prototype)
2023-08-20silvan2.3.7-2mamba- rebuild
2021-02-04silvan2.3.7-1mamba- update to 2.3.7
2017-12-10silvan2.3.6-2mamba- remove requirement for unexisting libadms and add build requirements
- add -DBUILD_SHARED_LIBS=OFF because not working well yet (see CMakeLists.txt)
2017-04-13ercolinux2.3.6-1mamba- package created using the webbuild interface
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