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adms: A code generator for the Verilog-AMS language

ADMS is a code generator that converts electrical compact device models specified in high-level description language into ready-to-compile C code for the API of spice simulators. Based on transformations specified in XML language, ADMS transforms Verilog-AMS code into other target languages.
Name:adms
Release: 2.3.7-2mamba
Architecture:x86_64
Group:Applications/Scientific
Size:287.42 kB
Upstream URL:https://sourceforge.net/projects/mot-adms/
Source RPM:adms
BrothersProvidesObsoletesRequiresRecommends
adms-debug
adms = 0:2.3.7-2mamba
adms(x86-64) = 0:2.3.7-2mamba
libc.so.6(GLIBC_2.34)(64bit) [1]
libm.so.6()(64bit) [1]
rtld(GNU_HASH) [1]
Provided files