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adms: A code generator for the Verilog-AMS language
ADMS is a code generator that converts electrical compact device models specified in high-level description language into ready-to-compile C code for the API of spice simulators. Based on transformations specified in XML language, ADMS transforms Verilog-AMS code into other target languages.
Name: | adms |
Release: |
2.3.7-2mamba |
Architecture: | i586 |
Group: | Applications/Scientific |
Size: | 304.71 kB |
Upstream URL: | https://sourceforge.net/projects/mot-adms/ |
Source RPM: | adms |
Brothers | Provides | Obsoletes | Requires | Recommends |
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adms-debug
| adms = 0:2.3.7-2mamba adms(x86-32) = 0:2.3.7-2mamba
| | libc.so.6(GLIBC_2.34) [1] libm.so.6 [1] rtld(GNU_HASH) [1]
| |
Provided files/usr/bin/admsCheck
/usr/bin/admsXml
/usr/include/adms
/usr/include/adms/constants.vams
/usr/include/adms/disciplines.vams
/usr/lib/.build-id
/usr/lib/.build-id/2b
/usr/lib/.build-id/2b/9de8f75c85b658f9ac243aa729285214c0b009
/usr/lib/.build-id/d4
/usr/lib/.build-id/d4/ab8a0dafaf7ce19416e57a56c87ac8544c8ae3
/usr/share/doc/adms-2.3.7
/usr/share/doc/adms-2.3.7/AUTHORS
/usr/share/doc/adms-2.3.7/COPYING
/usr/share/man/man1/admsCheck.1.gz
/usr/share/man/man1/admsXml.1.gz