adms: A code generator for the Verilog-AMS language

ADMS is a code generator that converts electrical compact device models specified in high-level description language into ready-to-compile C code for the API of spice simulators. Based on transformations specified in XML language, ADMS transforms Verilog-AMS code into other target languages.

Name:	adms
Release:	2.3.7-2mamba
Architecture:	i586
Group:	Applications/Scientific
Size:	304.71 kB
Upstream URL:	https://sourceforge.net/projects/mot-adms/
Source RPM:	adms

Brothers	Provides	Obsoletes	Requires	Recommends
adms-debug			libc.so.6(GLIBC_2.34) [1] libm.so.6 [1] rtld(GNU_HASH) [1]

Provided files